Field effect transistors have been known for many years and have been used extensively in many applications requiring among other things high input impedance, low input capacitance, high radiation tolerance and bilateral symmetry. Gallium arsenide field effect transistors are preferred over their silicon counterparts in certain high frequency operations because of their low noise and high power capabilities. One of the difficulties in processing gallium arsenide field effect transistors has been in making a reliable insulator on a gallium arsenide substrate. This problem has been by-passed by using Schottky-barrier gates to replace the insulated gates.
One important electrical parameter of a field effect transistor is its transconductance. Transconductance is the change of drain current caused by a change in the gate voltage. The external transconductance of a field effect transistor is increased as the ohmic resistance between the source and gate of the transistor is reduced. Another important device parameter adversely affecting the power gain of a field effect transistor is the drain-to-gate capacitance. The drain-to-gate capacitance should be as low as possible since it serves as a reverse feedback path for the output signal, and thus tends to reduce the power gain of the device. Both source-to-gate resistance and drain-to-gate capacitance are directly related to the geometric distances between the three regions of the transistor. To reduce the source-to-gate resistance and thus increase the transistor's transconductance, it is necessary to reduce the physical distance between the two regions. However, as this distance decreases, so does the breakdown voltage between them and this can become a limiting factor in the operation of the transistor. Therefore, it is important to have a process that can produce devices having the distances between the different regions kept within close tolerances.